Board Level Simulation    1n-Circuit Design specializes in high speed multilayer PCB Design including design for Signal Integrity and EMC.


 

Have you designed a product that: 

  • Will not work at full speed.

  • Can not pass FCC /CISPR /VCCI EMC tests.

  • Can not achieve a reasonable manufacturing yield.

  • Has high warranty return costs.

  • Required a number of iterations and extended time to market.

 

If you are experiencing any of these issues - we can help!

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This Application Note details tried and proven design rules and techniques for DDR, DDR2 & DDR3 PCB Design.

Board Level Simulation Process 

High speed digital boards can be designed to work ‘Right First Time’ with little additional effort providing you follow a tried and proven process that results in a reliable, manufactureable design that conforms to specifications and is produced on time and to budget.

Our design process reduces board iterations and therefore time to market subsequently increasing your profit.

1. Determine the maximum size of vias, traces and clearances from the minimum pitch of the BGA's.
2. Calculate the Characteristic Impedance (Zo), Differential Impedance ( Zdiff) and plan the Stack-up of the PCB. This gives you the technology rules required for the design. Zo should be between 50 - 70 ohm and Zdiff roughly twice Zo. A field solver is used to accurately calculate the Stack-up.
4. Download available IBIS models for all active devices where possible.
5. Perform a pre-layout Simulation to predict and eliminate signal integrity issues early, proactively constrain routing and optimize clock, critical signal topologies and terminations prior to board layout.
6. Place components according to simulation constraints.
7. Route traces according to simulation constraints taking particular care of critical signals, differential pairs and flight times.
8. Run a batch mode simulation of the entire board flagging Signal Integrity, Crosstalk and EMC hot spots.
9. Check termination values against transmission line affects.
10. Run an interactive simulation of the critical nets to look at Signal Integrity, Crosstalk and EMC in greater detail. Ensure the EMC levels are well below that of FCC/CISR/VCCI class B.

But, you haven't followed this process and you're in trouble - we can still help!

Electro Magnetic Compliancy certification can cost thousands of dollars plus failure to comply can cost even more in re-spins, delayed production, time to market and lost opportunity.

The good news is that In-Circuit Design is now offering a PCB Simulation Service:

·         We can do a board level simulation of your PCB design analyzing potential Signal Integrity, Crosstalk and EMC issues to FCC, CISPR & VCCI Class A & B standards.

·         If your design has no issues then we give you a big tick and you can be assured that your PCB will pass Electro Magnetic Compliancy.

·         If we do happen to find Signal Integrity, Crosstalk or EMC issues then we can quote you on the time required to further identify and analyze these problems and recommend an appropriate solution.

·         We can then re-simulate the board, once you have made the recommended changes, to ensure the design will pass the final EMC certification. Simulate twice - build once!

 

Apart from the issues of EMC, Signal Integrity and Crosstalk problems can cause intermittent operation due to timing glitches and interference dramatically reducing your product’s reliability.

 

By utilizing our PCB Simulation Service, you can be assured that your PCB will pass the relevant compliancy tests saving you time, money and frustration for a fraction of the cost of board iterations and multiple compliancy testing. Plus, the simulation can be done before the design is finalized (before Gerber output or even earlier in the design process) to further reduce production time and costs.

 

The Simulation software interfaces to Altium Designer, Protel and P-CAD; Mentor Graphics PADS Layout, Expedition and Board Station; Cadence Allegro, SPECCTRA and OrCAD Layout; Intercept Pantheon; Zuken CADStar, Visula and CR3000/5000 PWS or Board Designer.

 

Please email sim@icd.com.au for a PCB Simulation.*

 

Regards,

 

Barry Olney

Board Level Simulation Specialist

In-Circuit Design Pty Ltd
 

Barry has over twenty years experience with high speed multilayer PCB design and has assisted customers with their SI and EMC problems for the past 15 years.  Barry presents and is the author of Advanced Design for SMT and the Fundamentals of High Speed Design throughout Australia.

Note: You must have a registered company (students, academics and hobbyist are not eligible). Only multilayer PCB's with at least one solid plane can be simulated. The free simulation is provided at the discretion of In-Circuit Design. All trademarks are registered trademarks of their respective owners.

© Copyright 1996-2009 In-Circuit Design Pty Ltd.